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Preliminary Preliminary
Product Description
Stanford Microdevices' SGA-8343 is a high performance SiGe HBT amplifier designed for operation from DC to 6 GHz. This RF device uses the latest Silicon Germanium Heterostructure Bipolar Transistor (SiGe HBT) process. The SGA-8343 is optimized for 3V operation but can be biased at 2V for low-voltage battery operated systems. The device is easily matched as OPT is very close to 50 ohms. This device provides high gain, low NF, and excellent linearity at a low cost.
SGA-8343
Low Noise, High Gain SiGe HBT
Product Features
Typical Gain Performance
40
Gain, Gmax (dB)
2.4 2.1 1.8 1.5 1.2
Gmax
35 30 25 20 15 10 5 0 0 1
FMIN
Gain
0.9 0.6 0.3 0
* 6 GHz Useful Bandwidth * Low FMIN: 0.9 dB @ 0.9 GHz 1.1 dB @ 1.9 GHz * High Gain (Gmax): 24 dB @ 0.9 GHz 19 dB @ 1.9 GHz * Easily Matched with |OPT| = 0.17 @ 1.9 GHz * OIP3 = +28.5 dBm, P1dB = +13 dBm * Low Cost High Performance SiGe HBT
FMIN (dB)
Applications
* LNA for Wireless Infrastructure * Fixed Wireless Infrastructure * Wireless Data * Driver Stage for Low Power Applications * Oscillators
2 3 4 5 Frequency (GHz)
6
7
8
Symbol
Device Characteristics, T = 25C VCE=3V, ICQ=10mA (unless otherw ise noted) Maximum Available Gain ZS=ZS*, ZL=ZL* Insertion Gain ZS=ZL=50 Minimum Noise Figure ZS=OPT, ZL=ZLOPT Output 1 dB compression point ZS=ZSOPT, ZL=ZLOPT Output Third Order Intercept Point ZS=ZSOPT, ZL=ZLOPT DC Current Gain Collector - Emitter Breakdown Voltage Thermal Resistance (junction to lead) f = 0.9 GHz f = 1.9 GHz f = 2.4 GHz f = 0.9 GHz f = 1.9 GHz f = 2.4 GHz f = 0.9 GHz f = 1.9 GHz f = 2.4 GHz VCE=2V, ICQ=20 mA VCE=3V, ICQ=20 mA VCE=2V, ICQ=20 mA VCE=3V, ICQ=20 mA
Units
Min.
Typ. 23.9 19.3 17.7 21.8 16.3 14.3 0.9 1.1 1.2 10.0 13.3 24.0 28.5
Max.
GMAX
dB
S 21
dB
Fmin P 1dB OIP3 hFE B V C EO Rth
dB
dB m dB m 120 V C/W 5.7
180 6.0 200
300
The information provided herein is believed to be reliable at press time. Stanford Microdevices assumes no responsibility for inaccuracies or omissions. Stanford Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Stanford Microdevices does not authorize or warrant any Stanford Microdevices product for use in life-support devices and/or systems. Copyright 2001 Stanford Microdevices, Inc. All worldwide rights reserved.
726 Palomar Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC
http://www.stanfordmicro.com
EDS-101845 Rev. A
1
Preliminary SGA-8343 Low Noise SiGe HBT
Typical Performance - Deembedded S-Parameters
Gain vs Frequency (3V,10mA)
40 0
Gain vs Frequency (2V,10mA)
Gain, Gmax (dB)
40 35 30 25 20 15 10 5 0 0 1 2 3 0 -5 -10 -15 -20 -25 -30 -35 -40 5 6 7 8
Gain, Gmax (dB)
35 30 25 20 15 10 5 0 0 1 2 3
Isolation
-5 -10 -15 -20 -25 -30 -35 -40 5 6 7 8
Isolation (dB)
Isolation (dB)
Isolation
Gmax Gain
Gmax Gain
4
4
Frequency (GHz) S11,S22 vs Frequency (3V,10mA)
1.0 0.5 2.0
Frequency (GHz) S11,S22 vs Frequency (2V,10mA)
1.0 0.5 2.0
8 GHz 6 GHz
0.2 5.0 0.2
8 GHz 6 GHz
5.0
4 GHz 3 GHz
0.0 0.2 0.5 1.0 2.0 5.0 inf 0.0
4 GHz
3 GHz
0.2 0.5 1.0 2.0 5.0 inf
2 GHz S22
0.2 5.0 0.2
2 GHz S22
5.0
1 GHz S11
0.5 2.0 0.5
1 GHz S11
2.0
1.0
1.0
Note: S-parameters are de-embedded to the device leads with Z S=Z L=50. The data represents typical performace of the device. Deembedded s-parameters can be downloaded from our website (www.stanfordmicro.com).
Typical Performance - P1dB, OIP3, Gain
Freq (MH z ) VCE (V) 2 900 3 2 1900 3 2 2400 3 ICQ (mA) 10 20 10 20 10 20 10 20 10 20 10 20 P 1d B (dB m) 10.0 10.2 13.0 13.3 10.0 10.2 13.0 13.3 10.0 10.2 13.0 13.3 OIP 3 (dB m) 22.0 24.0 24.5 28.0 23.0 26.0 26.0 28.5 23.0 24.0 27.5 29.0 Gain (dB ) 25.0 24.0 24.4 24.4 16.7 16.4 18.0 18.0 15.0 15.0 15.3 15.3 ZLOPT Mag Ang 0.50 143.3 0.24 16.6 0.36 16.2 0.36 16.2 0.43 91.2 0.32 24.1 0.54 15.2 0.38 14.0 0.31 45.0 0.29 33.3 0.44 9.2 0.36 13.3
726 Palomar Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC
http://www.stanfordmicro.com
EDS-101845 Rev. A
2
Preliminary SGA-8343 Low Noise SiGe HBT
Typical Performance - Noise Parameters
Noise Figure (3V, 10mA)
2.4 2
FMIN
Gamma Opt (3V, 10mA)
30 25 20 15 10
0.5 1.0 2.0
FMIN (dB)
1.6 1.2 0.8 0.4 0 0 1 2 3 4 5 6 7
GAS
GAS (dB)
0.0
0.2
5.0
2.4 GHz
0.2
1.9 GHz
0.9 GHz
1.0 2.0 5.0 inf
5 0
0.2
3 GHz 4 GHz
0.5
5 GHz
5.0
Frequency (GHz)
0.5
6 GHz
2.0
1.0
Noise Parameters - VCE=3V, IC=10mA
Freq (MH z ) 0.9 1.9 2.4 3 4 5 6 FMIN (dB ) 0.94 1.1 1.18 1.27 1.5 1.73 2.02 Gamma Opt Mag Ang 0.10 55 0.17 125 0.23 157 0.23 179 0.29 -150 0.42 -122 0.55 -110 rn 0.11 0.10 0.09 0.09 0.12 0.18 0.24 GAS(dB ) 23.8 17.5 15.4 13.2 11.0 9.5 8.4 Gmax (dB ) 23.88 19.33 17.66 15.01 11.94 9.84 8.62
726 Palomar Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC
http://www.stanfordmicro.com
EDS-101845 Rev. A
3
Absolute Maximum Ratings
Parameter Collector Current Base Current Collector - Emitter Voltage Collector - Base Voltage Emitter - Base Voltage Operating Temperature Storage Temperature Range Power Dissipation Operating Junction Temperature Symbol IC IB V C EO V C BO V EBO TOP Tstor PDISS TJ Value 72 1 5 12 4.5 -40 to +85 -40 to +150 325 +150 Unit mA mA V V V C C mW C
Preliminary SGA-8343 Low Noise SiGe HBT
Part Number Ordering Information
Part Number SGA-8343 Reel Siz e 7" Devices/Reel 3000
Part Symbolization The part will be symbolized with an "A83" and a Pin 1 indicator on the top surface of the package.
Pin Description
Pin #
1 2 3 4
Function
B a se Emitter Collector Emitter RF Input
Description
Connection to ground. Use via holes to reduce lead inductance. Place vias as close to emitter leads as possible. RF Output Same as Pin 2
Caution: ESD sensitive
Appropriate precautions in handling, packaging and testing devices must be observed.
Package Dimensions
.079 .051.002
.021
4
3
.025 .049
C L
.091
1
2
C L
.024
.015 TYP(4X)
.014
.035
.038
NOTE: 1. ALL DIMENSIONS ARE IN INCHES 2. DIMENSIONS ARE INCLUSIVE OF PLATING 3. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH & METAL BURR 4. ALL SPECIFICATIONS COMPLY TO EIAJ SC70 FOR TRIM/FORM. ie: REVERSE TRIM/FORM 6. PACKAGE SURFACE TO BE MIRROR FINISH
.005 TYP(4X) .012 TYP(3X) .024
A fully dimensioned package outline is available on our website. Use multiple plated-through vias holes located close to the package pins to ensure a good RF ground connection to a continuous groundplane on the backside of the board.
726 Palomar Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC
http://www.stanfordmicro.com
EDS-101845 Rev. A
4

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